VPTESTMQ - Packed TEST Mask Qword
VPTESTMQ k1{k2}, xmm2, xmm3/m128/m64bcst (V5+VL
__mmask8 _mm_test_epi64_mask(__m128i a, __m128i b)
__mmask8 _mm_mask_test_epi64_mask(__mmask8 k2, __m128i a, __m128i b)
For each QWORD, calculate bitwise (1) & (2), if any bit of the result is 1, set 1, else set 0, to the corresponding bit of (3).
If k2 bit is 0, the calculation is not done and the corresponding bit of (3) is set to zero. Upper bits of (3) are zero cleared.
VPTESTMQ k1{k2}, ymm2, ymm3/m256/m64bcst (V5+VL
__mmask8 _mm256_test_epi64_mask(__m256i a, __m256i b)
__mmask8 _mm256_mask_test_epi64_mask(__mmask8 k2, __m256i a, __m256i b)
For each QWORD, calculate bitwise (1) & (2), if any bit of the result is 1, set 1, else set 0, to the corresponding bit of (3).
If k2 bit is 0, the calculation is not done and the corresponding bit of (3) is set to zero. Upper bits of (3) are zero cleared.
VPTESTMQ k1{k2}, zmm2, zmm3/m512/m64bcst (V5
__mmask8 _mm512_test_epi64_mask(__m512i a, __m512i b)
__mmask8 _mm512_mask_test_epi64_mask(__mmask8 k2, __m512i a, __m512i b)
For each QWORD, calculate bitwise (1) & (2), if any bit of the result is 1, set 1, else set 0, to the corresponding bit of (3).
If k2 bit is 0, the calculation is not done and the corresponding bit of (3) is set to zero. Upper bits of (3) are zero cleared.
x86/x64 SIMD Instruction List
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